Loading…
Loading grant details…
| Funder | Swedish Research Council |
|---|---|
| Recipient Organization | Lund University |
| Country | Sweden |
| Start Date | Jan 01, 2023 |
| End Date | Dec 31, 2026 |
| Duration | 1,460 days |
| Number of Grantees | 3 |
| Roles | Principal Investigator; Co-Investigator |
| Data Source | Swedish Research Council |
| Grant ID | 2022-04552_VR |
Since the 1940s, computing systems are based on the von Neumann architecture, where processor and memories are separate entities connected by a data bus, and computations are executed in a sequential manner. This creates a severe performance barrier, referred to as the memory bottleneck for many application.
For instance, artificial intelligence (AI) or machine learning (ML) applications require highly parallelized architectures to meet performance requirements.
Moreover, in smart applications at the Edge or internet of things (IoT) devices, real-time decision making with low latency, increased safety and data security measures,will require local data processing as well.
A technique to remedy this performance barrier is the integration of computation logic in the near proximity of memories that hold the data to be processed. This requires the development of data-centric architectures, referred as beyond von Neumann architectures.
In this study we are proposing near memory computing (NMC) technologies, which have the advantage of being scalable for various ML applications as well as being technology agnostic. The latter implies s that an architecture can be easily ported to different silicon technologies.
We will develop technology that improves computation speed by several orders of magnitude while increasing the energy efficiency.
Furthermore, an integrated circuit in an advanced silicon technology will be fabricated, and our simulation results by qualified by measurements.
Lund University
Complete our application form to express your interest and we'll guide you through the process.
Apply for This Grant