Bottom-up chip fabrication by e-CVD

The decrease in size and increase in performance of electronic devices is depending on the ability to produce hundreds of billions of uniform nanostructures over a 700 cm2 surface. The nanostructures are the individual electrical components and are not more than a few nanometers in size. The processing is done by carving out the nanostructures in a layer of solid material.

The top-down etching process is done by multiple processes, each with multiple steps, consuming high amounts of energy and time.

The goal of the project is to form a route to flipp the fabrication over and instead grow the nanostructures directly from the bottom-up. This will be done by an area selective deposition process based on surface reactions with free electrons from a plasma.

The project is based on my ongoing research with plasma electrons as surface reactants in chemical vapor deposition (CVD).

Since the electrons drawn from the plasma needs to be conducted away from the surface, the chemical reactions can only happen on areas of low resistivity.

The project will expand the research to elemental semiconductors and use surface areas with high electrical resistivity to block growth.

Once the process is established, the project will work to grow smaller and smaller structures to establish this new method for producing the nanostructures by a simple etching, followed by a single deposition step, substantially cutting down the time and energy required to produce nanoscale electronics.